Title:
半導体装置
Document Type and Number:
Japanese Patent JP7012767
Kind Code:
B2
Abstract:
A first transistor, a second transistor, a third transistor, a fourth transistor are provided. In the first transistor, a first terminal is electrically connected to a first wiring; a second terminal is electrically connected to a gate terminal of the second transistor; a gate terminal is electrically connected to a fifth wiring. In the second transistor, a first terminal is electrically connected to a third wiring; a second terminal is electrically connected to a sixth wiring. In the third transistor, a first terminal is electrically connected to a second wiring; a second terminal is electrically connected to the gate terminal of the second transistor; a gate terminal is electrically connected to a fourth wiring. In the fourth transistor, a first terminal is electrically connected to the second wiring; a second terminal is electrically connected to the sixth wiring; a gate terminal is connected to the fourth wiring.
Inventors:
Atsushi Umezaki
Application Number:
JP2020042739A
Publication Date:
January 28, 2022
Filing Date:
March 12, 2020
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G09G3/36; G02F1/133; G02F1/1368; G09G3/20; G09G3/3233; G09G3/3266; H01L51/50; H05B33/06; H05B33/14
Domestic Patent References:
| JP2006189762A | ||||
| JP2000155550A |