PURPOSE: To attain low power consumption and high-speed working with a semiconductor device by using a delay circuit containing an MOS-FET to delay a time point when an output stage MOS-FET which delivers a shaped waveform in response to an input signal is turned on until a reset state is secured.
CONSTITUTION: A precharge pulse Φp and an input pulse Φi are supplied to a delay circuit CCT1, and the signals having the same and adverse phases as and to the signal Φi are outputted to terminals 3 and 4 respectively. The 2nd waveform shaping circuit is connected to the terminals 3 and 4 via the 1st waveform shaping circuit consisting of MOS-FET (MOST)Q9 and Q10 and an MOSTQ8 forming a capacitor. The 2nd waveform shaping circuit contains an MSTQ18 forming a reverse layer capacity, a delay MOSTQ14, MOSTQ11 and Q13 forming an output stage and MOSTQ16 and Q12 which reset the potentials of the gate and the source of charging MOSTQ15 and Q11 respectively. Thus the through current is reduced with the high-speed rise characteristics secured for a waveform generator.
ETOU JIYUN
ITOU KIYOO
TANAKA HITOSHI
WATANABE YASUSHI
HITACHI MICROCUMPUTER ENG
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