Title:
半導体装置、電子機器及び認証システム
Document Type and Number:
Japanese Patent JP6863808
Kind Code:
B2
Abstract:
A novel semiconductor device is provided. A memory cell MC has a function of supplying a signal corresponding to the product of first data and second data to a wiring BX, and also has a function of supplying a signal corresponding to the product of the first data and third data to a wiring BY. The wiring BX is connected to a plurality of memory cells MC. Each of the plurality of memory cells MC outputs a signal corresponding to the result of the product operation to the wiring BX. The wiring BX has a function of transmitting a signal corresponding to the sum of these signals. The wiring BY is connected to a plurality of memory cells MC. Each of the plurality of memory cells MC outputs a signal corresponding to the result of the product operation to the wiring BY. The wiring BY has a function of transmitting a signal corresponding to the sum of these signals.
Inventors:
Yoshimoto Kurokawa
Application Number:
JP2017084112A
Publication Date:
April 21, 2021
Filing Date:
April 21, 2017
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G06F12/00; G06G7/12
Domestic Patent References:
| JP6274661A |