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Title:
SEMICONDUCTOR DIFFERENTIAL AMPLIFIER
Document Type and Number:
Japanese Patent JPH07240640
Kind Code:
A
Abstract:

PURPOSE: To perform offset compensation (suppression) with a small circuit by detecting a voltage less than a prescribed reduced cut-off frequency from the differential output signals of a differential amplifier part and adjusting an input DC bias corresponding to the voltage.

CONSTITUTION: This differential amplifier (main body) OP is operated by two power sources VDD and VSS, a coupling capacitor CA1 is connected between the noninverted input terminal and a signal input terminal, and the coupling capacitor CB1 of the same capacity is connected between an inverted input terminal and a ground terminal. Also, impedanre circuits ZA1 and ZA2 for setting an input bias are connected to the noninverted input terminal, and the impedance circuits ZB1 and ZB2 are connected to the inverted input terminal similarly. Then, by two low-pass filters constituted of feedback resistors RAF and RBF and capacitors CAF and CBF, the voltage less than the prescribed reduced cut-off frequency is detected from the differential output signals outputted from the differential amplifier OP, and the input DC bias is adjusted corresponding to the voltage.


Inventors:
TSUMURA HIDESHI
Application Number:
JP2976094A
Publication Date:
September 12, 1995
Filing Date:
February 28, 1994
Export Citation:
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Assignee:
SUMITOMO ELECTRIC INDUSTRIES
International Classes:
H03F3/45; H03F3/34; H03F3/347; (IPC1-7): H03F3/34; H03F3/45
Attorney, Agent or Firm:
Yoshiki Hasegawa (3 outside)