To provide a semiconductor integrated circuit device capable of supplying a power source voltage higher than a voltage from the outside to semiconductor circuits of a flash memory or the like and a memory.
This semiconductor integrated circuit device is provided with a boosting circuit 1 boosting an external power source voltage Vccext, a level detecting circuit 2 detecting the voltage fluctuation of a boosted voltage Vccint2, an internal voltage generating circuit 3 generating an internal voltage Vccint based on the boosted voltage Vccint2, an address buffer 4, an address decoder 5 and an memory cell array 6 having an EEPROM constitution. The level detecting circuit 2 is provided with a first level detecting circuit performing a level detection at the time of a memory access and a second level detecting circuit performing a level detection at the time of a standby. The internal voltage generating circuit 3 establishes a short circuit in the boosted voltage Vccint2 and the internal voltage Vccint at the time of a standby. Since the power consumption of the second level detecting part is smaller than that of the first level detecting circuit, the reducing of the power consumption at the time of the standby is attained without lowering a driving voltage.
SHIGA HITOSHI
ATSUMI SHIGERU
UMEZAWA AKIRA
