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Title:
半導体集積回路装置及び光センサ
Document Type and Number:
Japanese Patent JP7493225
Kind Code:
B2
Abstract:
To provide a semiconductor integrated circuit device including a dummy photodiode in which the possibility that the photocurrent reaches a signal processing circuit is very low.SOLUTION: A semiconductor integrated circuit device 3 includes a substrate 40, a processing circuit region 8, a first region 41, and an embedded region 42. The substrate 40 has a second conductivity type and is electrically connected to a second potential. The processing circuit region 8 performs signal processing. The first region 41 has a first conductivity type, is electrically connected to a first potential, is positioned closest to a display body or a pad 7 disposed on a surface of the device, and is bonded to the substrate 40. The embedded region 42 has the first conductivity type, has higher impurity concentration than the first region 41, and is positioned in contact with at least a part of the first region 41. The substrate 40, the first region 41, and the embedded region 42 function as a dummy photodiode that suppresses the flow, to the processing circuit region, of photocurrent resulting from light or the like having transmitted the pad 7 or the display body.SELECTED DRAWING: Figure 5

Inventors:
Takuya Kawamoto
Yukitoshi Takeyama
Hiroyuki Fukui
Toshie Sano
Mai Hirata
Hiroyuki Okada
Application Number:
JP2020128803A
Publication Date:
May 31, 2024
Filing Date:
July 30, 2020
Export Citation:
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Assignee:
Kodenshi Co., Ltd.
International Classes:
H01L31/10; H01L27/146
Domestic Patent References:
JP2000200892A
JP61127165A
JP62086751A
JP9321271A
JP2001339094A
JP63186465A
JP7131054A
Foreign References:
US20060220078
Attorney, Agent or Firm:
Naoki Katsuragawa