SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Japanese Patent JP2769653

B2

PURPOSE: To expand the operating margin against the fluctuation of a power supply voltage by controlling a field effect element connected in parallel. with one of field effect elements of inverter configuration with a voltage resulting from a power supply voltage reduced by a desired voltage.
CONSTITUTION: A voltage resulting from a power supply voltage Vcc subtracted by a threshold voltage X.Vth is produced by using plural (X) sets of N-channel transistors(TRs) 3b and the voltage is given to the gate of an N-channel TR 2b. When a higher voltage is given to the gate of the N-channel TR 2b, the current supply capability of the N-channel TR 2b is increased and a current flowing to an N-channel TR 1b of a CMOS inverter is increased. Thus, a minimum voltage used to discriminate an input signal to be at an H level is decreased, resulting in obtaining a margin. When a lower voltage is given to the gate of the N-channel TR 2b conversely, the current supply capability of the N-channel TR 2b is decreased and the current supply capability of a P- channel TR 1a is larger than the current supply capability of the N-channel TR 2b. Thus, a maximum voltage used to discriminate an input signal to be at an L level is increased, resulting in obtaining the operating margin.

Adachi Yukinobu

JP29018391A

June 25, 1998

November 06, 1991

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Mitsubishi Electric Corporation

H03K17/14; H03K19/003; H03K19/0948; (IPC1-7): H03K19/003; H03K19/0948

Fukami Hisaro (3 outside)

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