To reduce a cost for testing installations during testing a semiconductor integrated circuit operating with a high-speed clock.

A semiconductor integrated circuit device 1 includes a VCO oscillating circuit 10 to generate an inside clock formed with a high-speed clock, a timing generating circuit 5 to select either an outside clock supplied from the outside or the inside clock to be used, a logic circuit 9 to execute operation test for the semiconductor integrated circuit 1 and a memory 12 to store the result of the operation test, whereby the inside clock may be used during executing operation test and the outside clock may be used during outputting the result of the operation test stored in the memory 12 to the outside.