To remove the adverse effect on a peripheral circuit by setting an input/output terminal being unused by data writing operation to be a predetermined state at the time of data writing operation in a rewritable memory.

When a data writing mode in PROM 24 is detected, a mode detecting circuit 21 sends a write-ready signal to a PROM control circuit 22 and an interface circuit 23. By receiving the signal the circuit 23 becomes a data reading state, the circuit 22 sends a clear signal to PROM 24, and erasure is started. When the circuit 22 receives the write-ready signal, it sends a port setting signal to a memory 25 and a terminal mode setting data transfer circuit 27. By receiving the signal, the circuit 27 starts to transfer terminal mode setting data stored in the memory 25 to a terminal mode setting circuit 26. The circuit 26 sets the state of an input/output terminal 13e for a PROM writing mode by means of the transferred set data.