Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP2004228844
Kind Code:
A
Abstract:
To prevent the signals applied to an output buffer from the outside from colliding with signals outputted from the output buffer by controlling the output timing of the output signals.
Internal output control signals are shifted by the clock signals to generate timing. Optional timing is selected from the generated timing, and internal information is outputted at the selected timing so as to protect the output signals against collision. The output timing can be optionally changed by taking advantage of its function.
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Inventors:
OKUZUMI TETSUYA
Application Number:
JP2003013283A
Publication Date:
August 12, 2004
Filing Date:
January 22, 2003
Export Citation:
Assignee:
NEC CORP
International Classes:
G11C11/413; G11C11/417; H03K5/00; H03K19/0175; (IPC1-7): H03K19/0175; G11C11/413; G11C11/417; H03K5/00
Attorney, Agent or Firm:
Minoru Kudo
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