To specify the position of a surface picture in a semiconductor integrated circuit when the surface picture thereof is magnified and displayed.

When a peripheral dummy pattern is given any feature by giving changes such as thinning out, changing of shape or size, etc. to a dummy pattern formed in an uppermost wiring layer area for flattening an interlayer film and the surface picture of the semiconductor integrated circuit is magnified and displayed, the position of the surface picture in the semiconductor integrated circuit can be specified. In addition, to clarify a specified section 204 including the changed dummy pattern, a specific dummy pattern is given any change such as thinning, changing of shape or size, etc., thereby specifying the position of the surface picture easily in the semiconductor integrated circuit when the surface picture of the semiconductor integrated circuit is magnified and displayed.