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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH10135345
Kind Code:
A
Abstract:

To obtain a high current amplification factor for each of a high and low breakdown voltage types by selectively disposing a second buried layer just below emitters of lateral pnp transistors.

First and second epitaxial layers 22, 24 on a substrate 21 are separated to form island regions 27. High breakdown voltage npn 28, low breakdown voltage npn 32, low breakdown voltage pnp 33 and high breakdown voltage pnp 37 are respectively formed on the island regions 27 surfaces, depending on the existence of first and second buried layers 23, 25. At the high breakdown voltage pnp 37, the second buried layer 25 is selectively disposed only at the lower parts of emitter regions 34. With keeping a high breakdown voltage, the reactive current to the substrate 21 is reduced to obtain a high current amplification factor. Since the emitter part has an identical structure to the low breakdown voltage pnp 33, the current amplification factors of both can be made equal.


Inventors:
SHIMAMURA TETSUO
SHIMADA RIICHI
NAGANUMA AKIHIRO
Application Number:
JP29069396A
Publication Date:
May 22, 1998
Filing Date:
October 31, 1996
Export Citation:
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Assignee:
SANYO ELECTRIC CO
International Classes:
H01L27/082; H01L21/8222; H01L21/8228; (IPC1-7): H01L21/8228; H01L21/8222; H01L27/082
Attorney, Agent or Firm:
Koji Yasutomi (1 person outside)