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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS6365662
Kind Code:
A
Abstract:

PURPOSE: To abate noise in response to the size of noise generated in service circumstances for the prevention of erroneous operations by a method wherein serial circuits of capacitors and switch elements operable through outer terminals are built between the input end and ground line of an inner input stage circuit.

CONSTITUTION: An input signal V1 from an outer input terminal T1 is applied to an inner input stage circuit 1a via a resistor R1. Between the input end and ground line LE of the inner input stage circuit 1a, serial circuits 2a and 2b are provided. The serial circuit 2a is constituted of a capacitor C1 of a prescribed static capacity and a switch element Q1 to be turned off or on upon a control signal VC1 supplied by an outer terminal T01 via a resistor R3. The serial circuit 2b is constituted of a capacitor C2 end a switch element Q2 to be turned on or off upon a control signal VC2 supplied by an outer terminal T02 via a resistor R4. Similarly, between the input end and ground line LE of an inner input stage circuit 1b, a serial circuit 2c constituted of a capacitor C3 and switch element Q3 and a serial circuit 2d constituted of a capacitor C4 and switch element Q4 are provided.


Inventors:
SASE RYUICHI
Application Number:
JP21024886A
Publication Date:
March 24, 1988
Filing Date:
September 05, 1986
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L27/04; H01L21/822; (IPC1-7): H01L27/04
Attorney, Agent or Firm:
Uchihara Shin