PURPOSE: To reduce the time constants and to improve the switching characteristics of the semiconductor inverter circuit element by forming a buried region under the common region of the drain and the source of driving and loading MOS transistors when forming an inverter circuit element with the transistors.

CONSTITUTION: An N+-type buried region 20 is diffused in a P-type Si substrate 10, a P-type layer 11 is epitaxially grown on the entire surface including the region 20, and an N+-type region 22 is diffused as the drain region for the driving element and the source region of the loading element oppositely to the region 20 in the layer 11. Then, an N+-type source region 21 for the driving element and an N+-type drain region 23 for the loading element are diffused in the layers 11 at both sides of the region 22, a gate insulating film 52 for the driving element is coated on the surface of the layer 11 between the regions 21 and 22, and a gate insulating film 54 for the loading element is coated on the surface between the regions 22 and 23. Thereafter, the electrode 51 formed on the region 21 is grounded, and the electrode 54 attached to the region 23 is connected to a power supply voltage 54.