Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JP2022134165
Kind Code:
A
Abstract:
To provide a semiconductor memory device that can be easily highly integrated.SOLUTION: A semiconductor memory device has a substrate, a plurality of conductive layers aligned in the first direction and extending in the second direction, a semiconductor layer extending in the first direction and facing the plurality of conductive layers, and n contact electrode regions aligned in the third direction, where n is a power of 2. The contact electrode region has a plurality of contact electrodes aligned in the second direction. The plurality of conductive layers includes a first conductive layer and a second conductive layer that is the nth conductive layer counting from the first conductive layer. The plurality of contact electrodes includes a first contact electrode connected to the first conductive layer, a second contact electrode connected to the second conductive layer, and a third contact electrode provided between the first and second contact electrodes. The first contact electrode, the second contact electrode, and the third contact electrode are aligned in the second or third direction.SELECTED DRAWING: Figure 6
Inventors:
FUKUDA NATSUKI
IGUCHI SUNAO
IGUCHI SUNAO
Application Number:
JP2021033117A
Publication Date:
September 15, 2022
Filing Date:
March 03, 2021
Export Citation:
Assignee:
KIOXIA CORP
International Classes:
H01L27/11582; H01L21/336; H01L27/11519; H01L27/11548; H01L27/11556; H01L27/11565; H01L27/11575
Attorney, Agent or Firm:
Patent Attorney Corporation Kisaragi International Patent Office
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