Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JP3471565
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To prevent erroneous reading and writing of a multiport SRAM(static random access memory) caused by a crosstalk noise between bit lines.
SOLUTION: For example, the linkage position of bit line pairs RBLi, RBLi/ connected to the same column of memory cells MCi,1-MCi,n and that of bit line pairs WBLi, WBLi/are different in a position in the row direction. Moreover, the linkage position in the bit line parts WBLi, WBLi/is connected to the adjacent column of memory cells MCi-1,1-MCi-1,n, MCi+1,1-MCi+1,n and is different from the linkage position in the bit line parts WBLi-1, WBLi-1/and WBLi+1, WBLi+1/. Consequently, a crosstalk noise caused due to a capacity between the bit lines is cancelled by the common-mode elimination effect.
Inventors:
Koichi Yokomizo
Application Number:
JP15082797A
Publication Date:
December 02, 2003
Filing Date:
June 09, 1997
Export Citation:
Assignee:
Oki Electric Industry Co., Ltd.
International Classes:
G11C11/41; G11C11/413; (IPC1-7): G11C11/41; G11C11/413
Domestic Patent References:
| JP4214295A | ||||
| JP2183489A | ||||
| JP97373A |
Attorney, Agent or Firm:
Yasunari Kakimoto
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