PURPOSE: To execute high speed transmitting by forming a transfer gate to be in a conductive condition when a comparing data signal is a first level and to transfer read data and an inverter to be in an active condition when it is a second level and to invert the read data.
CONSTITUTION: When a comparing data signal 1 connected between a reading data bus 2 and a comparing data bus 4 is a grounding electric potential level '0', data RD of the bus 2 pass through only a transfer gate 31 and are transferred to the comparing data bus 4 as they are. Besides, when the signal 1 is a source potential level '1', the data RD are inverted and transferred to the comparing data bus 4 through only an inverter circuit 32. That is, when the data transferred to the comparing data bus 4 are CD, the relation of the comparing data signal 1, the data RD and CD becomes like a truth figure, an exclusive OR operating function is performed and a passing gate circuit is satisfied with one stage, and the transferring time of the data can be shortened.
JPS6214523A | 1987-01-23 | |||
JPS5982695A | 1984-05-12 | |||
JPS59207477A | 1984-11-24 |