To provide a semiconductor memory which can perform confirmation of presence or absence of a short circuit of word lines and pairs of bit lines in a manufacturing process and specifying a short circuit part, in wafer state and to provide its test method.

This memory is provided with a first power source VBL which can be connected to a plurality of pairs of bit line BL-L/BL-L through transistors and which gives the prescribed potential to each pair of bit line when connected, and a second power source VBL1 which can be connected to a local IO line, can be connected to the prescribed pair of bit line by selection of a column selection line CSL by an external address, and which gives the prescribed potential when connected, and in pre-charge operation of a test mode, the first power source is separated from each pair of bit line, while voltage is applied to the prescribed pair of bit line from the second power source, a bit line short-circuiting to a word line WL is specified by measuring a leak current.