Title:
SEMICONDUCTOR MEMORY
Document Type and Number:
Japanese Patent JPH0536298
Kind Code:
A
Abstract:
PURPOSE: To detect the failure such as the short-circuit of the boosted nodal point in a short time by stopping the supply of a charge to the boosted nodal point.
CONSTITUTION: A control circuit 3 to control the supply of a charge to a boosted nodal point A of a charge supply circuit 2 is provided. When the control circuit is set to a test mode by an internal test mode signal TI and a control signal from an external part satisfies the prescribed conditions, the charge supplying action of the charge supply circuit 2 is stopped.
Inventors:
MATSUI YOSHINORI
Application Number:
JP19338091A
Publication Date:
February 12, 1993
Filing Date:
August 02, 1991
Export Citation:
Assignee:
NEC CORP
International Classes:
G11C11/413; G11C11/401; G11C11/407; G11C29/00; G11C29/12; (IPC1-7): G11C11/413; G11C29/00
Domestic Patent References:
| JPH01166399A | 1989-06-30 | |||
| JPH0335491A | 1991-02-15 | |||
| JPS62298097A | 1987-12-25 |
Attorney, Agent or Firm:
Uchihara Shin