To prevent malfunction by non-activating an input gate of a latch circuit in case of activation of a signal based on the output of a rising detection circuit.

The output of a clocked inverter 33 is connected to an input node of an inverter 32 in a latch circuit 10, and latch constitution is formed. An output of the latch circuit 10 is an output of the inverter 32. Clocked inverters 33 and 31 are constituted so that either of them is operated by a control signal ATDL and an inversion signal. When an output signal OEC of an OE control circuit is 'L' state, the signal ATDL outputs a pulse in accordance with the signal ATD, when the OEC is a 'H' state, the signal ATDL is fixed to L. Thereby, while the OEC pulse is activated, the control signal ATDL of the latching circuit 10 does not depend on the signal ATD being an address transfer signal.