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Patent Searching and Data


Title:
SEMICONDUCTOR MODULE
Document Type and Number:
Japanese Patent JP2004047807
Kind Code:
A
Abstract:

To provide a semiconductor module whose breakdown voltage can be improved.

The semiconductor module 1 includes a support substrate provided with first and second principal surfaces that are opposed to each other. A semiconductor chip is arranged in an upper potion of the first principal surface. Wiring patterns connected with the semiconductor chip are arranged on the first principal surface between the support substrate and the semiconductor chip. Connection terminals connected with the wiring patterns via an wiring layer formed by penetrating the support substrate is arranged on the second principal surface. A conductive film that has the same height as the interconnection patterns has and is non-connected with the wiring patterns and the semiconductor chip is arranged on the first principal surface under the semiconductor chip. A connection conductive layer for forming a discharging channel of static electricity charged in the conductive film is formed by penetrating the support substrate connected with the conductive film. A discharging terminal that is connected with the connection conductive layer and is non-connected with the connection terminal is arranged on the second principal surface. The first principal surface and the semiconductor chip are covered with insulative sealing members.


Inventors:
KANAZAWA TAKESHI
Application Number:
JP2002204441A
Publication Date:
February 12, 2004
Filing Date:
July 12, 2002
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L23/12; H01L23/00; (IPC1-7): H01L23/12; H01L23/00
Attorney, Agent or Firm:
Takehiko Suzue
Sadao Muramatsu
Atsushi Tsuboi
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Shoji Kawai