To provide a mounting structure, capable of reducing a memory size and sufficiently ensuring the interval between a word line and first and second charge accumulation sections for recording information for changing a memory cell into an array for a memory, that can make a semiconductor non-volatile memory cell operate by a simpler method and can reduce the manufacturing cost.

The semiconductor non-volatile memory cell array has a plurality of semiconductor non-volatile memory cells. The memory cell comprises a control electrode 30, a pair of impurity diffusion regions 21, 22 functioning as first and second main electrodes; resistance change sections 24, 26; and the charge accumulating sections 50, 52. There are word line 33 electrically connected to the control electrode of the plurality of semiconductor non-volatile memory cells, and a bit line that is arranged so that it crosses the work line and is made of the impurity diffusion regions. Interlayer insulating films 57, 58 are formed between the charge accumulation section and the word line.