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Title:
SEMICONDUCTOR PROTECTION DEVICE
Document Type and Number:
Japanese Patent JPS6021561
Kind Code:
A
Abstract:

PURPOSE: To enable to adjust the withstand voltage to an arbitrary value less than the junction withstand voltage by prevention of a high withstand voltage transistor incorporated in a complementary type semiconductor device by a method wherein an impurity diffused region of one conductivity type is provided in a well of reverse conductivity type to that of a substrate, and then a diode is constructed between the well and the substrate.

CONSTITUTION: The well 12 of reverse conductivity type to that of the semiconductor substrate 11 of one conductivity type, and the diffused layers 13 and 14 are provided in the substrate. The diffused layer 14 is of reverse conductivity type to that of the well, goes inside the boundary of the well, and exists in electrically floating state at a high concentration. The diffused layer 13 connects to the well at the same potential but has difference in impurity concentration, and the diffused layer 15 connects to the substrate at the same potential but has difference in impurity concentration; thus constructing the P-N junction diode between the well and the substrate. The withstand voltage can be determined by arbitrary selection of the distance l1 from the well end to the diffused layer 15 and the distance l2 to the diffused layer 14 based on the determination of characteristics.


Inventors:
ARAKI MINORU
Application Number:
JP12901183A
Publication Date:
February 02, 1985
Filing Date:
July 15, 1983
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L21/8238; H01L27/092; H01L29/78; (IPC1-7): H01L27/08; H01L29/78
Domestic Patent References:
JPS5768071A1982-04-26
JPS5723269A1982-02-06
JPS5681966A1981-07-04
JPS51126770A1976-11-05
Attorney, Agent or Firm:
Uchihara Shin



 
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