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Title:
SEMICONDUCTOR PROTECTIVE DEVICE
Document Type and Number:
Japanese Patent JPH04196352
Kind Code:
A
Abstract:

PURPOSE: To protect arm inner circuit against surges by a structure where latchup hardly occur by a method wherein a semiconductor region is provided in a substrate provided with an inner circuit, where the semiconductor region is dielectrically isolated from the substrate by an insulator, and a first and a second thyristor are formed in the semiconductor region concerned.

CONSTITUTION: A semiconductor region dielectrically isolated from a substrate by an insulator is formed in the substrate provided with an inner circuit, and a first and a second thyristor, 302 and 303, are provided inside the semiconductor region concerned. At this point, the thyristors 302 and 303 formed dielectrically isolated from the substrate are connected between an input terminal and a VSS terminal and between an input, terminal and a VDD terminal respectively. By this setup, an inner circuit can be protected against surges applied between an input terminal and a VSS terminal and between an input terminal and a VDD terminal by a structure where latchup hardly occurs.


Inventors:
SHINOHARA TOSHIAKI
Application Number:
JP32649590A
Publication Date:
July 16, 1992
Filing Date:
November 28, 1990
Export Citation:
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Assignee:
NISSAN MOTOR
International Classes:
H01L27/04; H01L21/822; H01L27/06; H01L29/861; H01L27/02; (IPC1-7): H01L23/522; H01L23/556; H01L23/60; H01L23/62; H01L27/04