PURPOSE: To shorten a data transfer distance between an address conversion device and memories and to shorten transfer time by arranging several memories in the same entry of the address conversion device without separating them.

CONSTITUTION: An association memory cell array 1, first and second random access memory cell arrays 2 and 3, a first decoding means 4 generating the word signal of the association memory cell array 1, a control means 5 generating the word signal of the first random access memory cell array 2 by using the word signal of the association memory cell array 1 and a compared result of the association memory cell array 1 and a second decoding means 6 generating the word signal of the second random access memory cell array 3 are provided for the entry of the address conversion device 1. Then, data are outputted from a place where several memories arranged in the same entry of the address conversion device without being separated are approximated. Thus, the data transfer distance between the address conversion device and the memories is shortened and transfer time is shortened.