PURPOSE: To eliminate a difference in level on a peripheral circuit by a method wherein a dummy pattern which is used to reduce a difference in level between the peripheral circuit part and a memory cell array part is formed in the peripheral circuit part.

CONSTITUTION: Before an interconnection process, a phosphosilicate glass(PSG) film 14 is deposited by a thickness of the difference in a height between a RAM cell array part 11 and a peripheral circuit part 12. A photoresist 15 is coated, exposed to light and developed; after that, it is etched by buffer hydrofluoric acid. Since the etching rate of a PSG is larger than that of a boro- phosphosilicate glass(BPSG) at this time, a BPSG film 13 can be utilized as an etching stopper in the RAM cell array part. Then, the resist 15 is removed; after that, an SiO2 film 16 is deposited. Thereby, the boundary part to the peripheral circuit part is made smooth and metal wiring 17 having no difference in level can be formed.