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Patent Searching and Data


Title:
SEMICONDUCTOR SUBSTRATE AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPH06302791
Kind Code:
A
Abstract:

PURPOSE: To inhibit a temperature rise generated in an SOI wafer by partially burying an insulating film into a single-crystal silicon substrate.

CONSTITUTION: A circuit 1 (34) is formed into a region, in which an insulator is not buried, on the left side of a single-crystal silicon substrate 31, a circuit 3 (36) into a region, in which an insulating film is not buried, on the right side of the substrate 31 and a circuit 2 (35) to a thin single-crystal silicon layer on the insulating film 32. There is no insulating layer under the circuit 1 of 34 and the circuit 3 of 36, and heat generated by operating these circuits 1, 3 escapes to the semi-conductive single-crystal silicon substrate 31. On the other hand, high speed properties are required particularly in the circuit 2 of 35 formed to the thin single-crystal silicon layer, an SOI layer 33, in the upper section of the insulating film 32, and heat generated in the SOI layer 33 by operating the circuit 2 proceeds to upper sections 37 and 38 at both end sections of the insulating film 32, and dissipated to the whole substrate 31 from the upper sections 37 and 38. Accordingly, the rise of a temperature can be inhibited even during the operation of the circuit 2.


Inventors:
TAKAHASHI KUNIHIRO
YAMAZAKI TSUNEO
TAKASU HIROAKI
SAKURAI ATSUSHI
Application Number:
JP9168693A
Publication Date:
October 28, 1994
Filing Date:
April 19, 1993
Export Citation:
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Assignee:
SEIKO INSTR INC
International Classes:
H01L21/265; H01L21/02; H01L21/76; H01L21/762; H01L27/12; (IPC1-7): H01L27/12; H01L21/265
Attorney, Agent or Firm:
Keinosuke Hayashi