To provide a semiconductor wafer allowing a compound semiconductor layer to be thickly formed on a substrate, and capable of reducing parasitic capacitance generated in a buffer region.

In the semiconductor wafer comprising a substrate 2, a buffer region 3 and a main semiconductor region 4, the buffer region consists of a plurality of multilayer structure buffer regions 5 in which a plurality of first layers 6 and a plurality of second layers 7 are alternately arranged; and an intermediate buffer region 8 interposed between a plurality of multilayer structure buffer regions. The first layer consists of a compound semiconductor having a lattice constant smaller than that of a material configuring the substrate, the second layer consists of a compound semiconductor having a lattice constant between the lattice constant of the material configuring the substrate and that of the first layer, and the intermediate buffer region is formed thicker than the first layer and the second layer, and has a lattice constant between the lattice constant of the material configuring the first layer and that of the second layer.