Title:
SEMICONDUCTOR WAFER HAVING HIGH PLANARITY, AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
Japanese Patent JP3584824
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To obtain as a whole a high polishing uniformity by chemical mechanical polishing(CMP) in a semiconductor wafer having high planarity, and its manufacturing method.
SOLUTION: A surface S of a semiconductor wafer W2, having a high planarity, is polished by a polishing cloth. Its surface S is made flat in the state of its rear surface R being sucked by vacuum by a flat plane H. Also, in the wavinesses of its surface S generated in the state of its rear surface R which is not sucked vacuously by the flat plane H, at least the wavinesses whose periods are smaller than the period capable of being followed by the polishing cloth and the wavinesses whose periods are not smaller than 0.2 mm, are removed.
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Inventors:
Etsuro Morita
Tsuyoshi Harada
Kazunari Takaishi
Tsuyoshi Harada
Kazunari Takaishi
Application Number:
JP36345199A
Publication Date:
November 04, 2004
Filing Date:
December 21, 1999
Export Citation:
Assignee:
Mitsubishi Sumitomo Silicon Co., Ltd.
International Classes:
H01L21/306; H01L21/304; (IPC1-7): H01L21/304; H01L21/306
Domestic Patent References:
| JP9260314A | ||||
| JP10135164A | ||||
| JP11233485A | ||||
| JP10256222A | ||||
| JP9248758A |
Attorney, Agent or Firm:
Masatake Shiga
Tadashi Takahashi
Takashi Watanabe
Masakazu Aoyama
Suzuki Mitsuyoshi
Yutaka Matsutomi
Kazuya Nishi
Yasuhiko Murayama
Tadashi Takahashi
Takashi Watanabe
Masakazu Aoyama
Suzuki Mitsuyoshi
Yutaka Matsutomi
Kazuya Nishi
Yasuhiko Murayama