To provide a shift register in which output of a needless drive pulse can be prevented by suppressing variation of gate voltage of an output transistor using reducing output impedance by bootstrap operation and a liquid crystal driver using this shift register.
The shift register has a plurality of stages connected in cascade and in which input data is shifted and shift operation of the input data is performed, each stage has a first diode connected to a gate of the output transistor and inputting the input data, a capacitor connected between the gate and a source of the output transistor, and a clamping transistor connected between the gate and the source of the output transistor in parallel to the capacitor, wherein a source of the clamping transistor is connected to the source of the output transistor, a drain of the clamping transistor is connected to the gate of the output transistor.
Sumio Tanai
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