SIGNAL GENERATOR

Japanese Patent JP2893230

B2

PURPOSE: To suppress the delay of an output signal at the time of its production and to suppress the generation of jitters by producing the output signal from a prescribed phase in accordance with the output of a free-running oscillator and a prescribed transition point of a control signal.
CONSTITUTION: An oscillator 2 produces a sinusoidal wave signal cos (ωt+α) and supplies it to a phase splitter 10. The signals of the same phase undergone the division of phase are outputted to a node 11, and an orthogonal sinusoidal wave signal sin (ωt+α) is outputted to a node 12. The sinusoidal wave signals of the same phase supplied from the splitter 10 are inputted to a 4-phase multiplier 31 and a track holding circuit 21. The circuit 21 has the track and enable states according to the 1st and 2nd states of the control signal supplied from a control signal source 20 respectively. The output of the circuit 21 is inputted to the multiplier 31, and the multiplication output of the amplifier 31 is sent to an adder 40. The output of the splitter 10 is inputted to a track holding circuit 22 and a multiplier 32. A positive control signal and a sinusoidal wave signal are multiplied by each other by the multiplier 32 and added together by the adder 40. Then a fixed output and a sinusoidal wave signal are outputted in the 1st and 2nd states respectively.

JP3100211

[Title of Invention] Reference circuit for angle converter

UIRIAMU ESU DORAMONDO
AASAA JEE METSUTSU
UORUTAA DEII FUIIRUZU

JP20714493A

May 17, 1999

July 29, 1993

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TEKUTORONITSUKUSU INC

G06G7/22; H03B28/00; H03L3/00; H03L7/00; (IPC1-7): H03B28/00; G06G7/22; H03L3/00

JP59153333A
JP5113548A
JP5167349A
JP360501A

Kunio Yamaguchi (1 person outside)

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