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Title:
SIGNAL INPUT CIRCUIT
Document Type and Number:
Japanese Patent JPS6020396
Kind Code:
A
Abstract:

PURPOSE: To facilitate the test of the refreshing function of a pseudo static RAM by connecting plural diode-connected MOSFETs between an external terminal and a grounding electrode, and deciding a voltage input which is higher than usual.

CONSTITUTION: A write voltage to the pseudo static RAM is outputted through an inverter I1 forming a buffer responding to a normal binary input voltage from an input terminal P1. Then, N channel diode-connected MOSFETs T1W T8 are connected in series between the terminal P1 and ground by connecting a gate and a drain and when the voltage applied to the terminal P1 becomes higher than usual exceeding the sum of threshold values of the FETs T1WT8, the high input voltage is detected through inverters I2 and I3. Then, a refresh counter is reset with a detection voltage reset. Thus, the refresh counter is reset without turning off the power source and the test of the refreshing function of the pseudo static RAM is taken easily.


Inventors:
OOISHI TSURATOKI
KITAME TETSUYA
Application Number:
JP12771483A
Publication Date:
February 01, 1985
Filing Date:
July 15, 1983
Export Citation:
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Assignee:
HITACHI LTD
HITACHI MICROCUMPUTER ENG
International Classes:
G01R31/28; G11C11/401; G11C11/403; G11C11/417; G11C11/406; G11C29/00; G11C29/02; G11C29/14; (IPC1-7): G01R31/28; G11C11/34; G11C29/00
Attorney, Agent or Firm:
Akio Takahashi