Title:
SIGNAL PROCESSING CIRCUIT AND METHOD THEREFOR
Document Type and Number:
Japanese Patent JP3852324
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a signal processing circuit and a signal processing method for converting an FM modulated signal into digital data capable of accurately detecting the high level period or/and low level period of an input pulse signal, by removing the influence of any noise components.
SOLUTION: This signal processing circuit is constituted of a charging circuit for performing charge with one polarity of an input pulse signal, a sample-and- hold circuit for sampling/holding a charging voltage with one polarity to be charged by the charging circuit in a period with the other polarity in which any chattering in not included in the input pulse signal, and an output circuit for outputting the voltage sampled-and-held by the sample-and-hold circuit as an output signal.
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Inventors:
Makoto Mashita
Application Number:
JP2001333102A
Publication Date:
November 29, 2006
Filing Date:
October 30, 2001
Export Citation:
Assignee:
TEAC Corporation
International Classes:
G11B20/10; H03K5/01; G06G7/186; H03M1/52; (IPC1-7): H03M1/52; G11B20/10
Domestic Patent References:
| JP4145715A | ||||
| JP8214033A | ||||
| JP63013520A |
Attorney, Agent or Firm:
Tadahiko Ito
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