Title:
SIGNAL PROCESSOR
Document Type and Number:
Japanese Patent JPS6417583
Kind Code:
A
Abstract:
PURPOSE:To simplify a constitution and to make the correction accurate by selecting a video digital data and voice digital data obtained from an A/D conversion, and storing the data in a digital memory. CONSTITUTION:An FM signal inputted from an input terminal 1 is made a demodulated signal C by a demodulator 5, and inputted to an A/D converter 6 and a synchronizing separator circuit 11. In the circuit 11, when an input signal C is video signal, a horizontal and vertical synchronizing signals are separated from the signal C. Accordingly, a CPU 16, based on a signal from the separator circuit 11, can decide whether the input signal is a video signal or a voice signal. Based on a clock from an oscillation circuit 13 and a synchronizing signal from the circuit 11 or a signal from the CPU 16, the timing of the A/D conversion by the A/D converter 6 is controlled, therefore, when an output signal from the A/D converter 6 is a video signal D, the areas R, G, B of the memory 8 are selected, and in case of the voice signal, the R area of the memory 8 is selected, and the signal is written therein.
Inventors:
KIMURA NORIO
Application Number:
JP17306087A
Publication Date:
January 20, 1989
Filing Date:
July 13, 1987
Export Citation:
Assignee:
CANON KK
International Classes:
H04N5/907; H04N5/91; H04N5/92; H04N5/94; (IPC1-7): H04N5/907; H04N5/92
Domestic Patent References:
| JPS61289778A | 1986-12-19 | |||
| JPS62296682A | 1987-12-23 | |||
| JPS5817606U | 1983-02-03 | |||
| JPS6247868A | 1987-03-02 | |||
| JPS6278990A | 1987-04-11 |
Attorney, Agent or Firm:
Yoshikazu Tani