SIMULATION MODEL FOR DESIGNING SEMICONDUCTOR DEVICE, METHOD FOR ANALYZING THERMAL DRAIN NOISE, AND METHOD AND DEVICE FOR SIMULATION

Japanese Patent JP3786657

B2

PROBLEM TO BE SOLVED: To provide a simulation model for designing a semiconductor device which enables a precise estimation of thermal drain noises based on the DC characteristics of a MOSFET.
SOLUTION: A method for providing the simulation model includes a step (STEP 8) of memorizing a calculated surface potential and a threshold voltage in a memory means, a step (STEP 9) of calculating the thermal drain noises on the basis of data of the surface potential and the threshold voltage which is memorized in the memory means, and a step (STEP 10) of judging whether or not to reduce the thermal drain noises and reflecting a result of the calculation of the thermal drain noises on the simulation model. According to the method, a drain current Ids of the MOSFET is calculated, and the calculated value is given as a substitutive value to an equation of thermal drain noises spectrum density, which is derived from a Nyquist theoretical equation to calculate a thermal drain noises coefficient γ of the MOSFET.

Miura Michiko
Hiroaki Ueno
Satoshi Hosokawa

JP2003420845A

June 14, 2006

December 18, 2003

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Semiconductor Science and Engineering Research Center Co., Ltd.

H01L29/78; G01J5/00; G06F7/60; G06F17/10; G06F17/50; G06G7/62; H01L21/336; H01L21/66; H01L23/58; H01L29/00; (IPC1-7): H01L21/336; G06F17/50; H01L29/00; H01L29/78

JP2002184969A
JP2002057332A

Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Takashi Mine
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto

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