PURPOSE: To simulate the same element plural times within one clock even when the scale of hardware is small by comparing the level of an input event with the smallest level among levels obtained so far to update a level register.

CONSTITUTION: Plural processors 10 under the command of a host processor 11 consists of an event 1, a level table 2, a comparator 3, a level register 4, a node table 5, a node counter 6, a control circuit 7, and a processing part 12. Then, when a change event with a node number 82 is inputted while an event with a node number 296 is processed, a comparator 3 compares the level 104 of the node number 296 with the level 103 of the node number 82 and the level register 4 is set to a new level 4. The, when a level return command 106 is inputted from the host processor 11, the control circuit 7 outputs a set signal 107, the node counter 6 returns to 63 from 269, and the processing part 12 restarts simulation which has a low level.