Title:
MICRO COMPUTER
Document Type and Number:
Japanese Patent JP3152551
Kind Code:
B2
Abstract:
PURPOSE: To reduce the power consumption of a nonvolatile memory by limiting the generation time of a command signal operating the nonvolatile memory to the time from the signal generation until a detection signal is generated.
CONSTITUTION: When an operation command signal *CE is fallen when the address data ADD is established command signal LCH of a control circuit 4 is raised, and the operation command signal *CE' is raised. After a prescribed time elapses, when a read content DATA of an EPROM 1 are established, the detection signal DET of a detection circuit 3 is raised, and the latch command signal LCH is fallen, and the *CE' is raised. Then, the *CE' is generated only for the time when the EPROM 1 becomes a read state and the program data DATA is decided, and the DATA are held by a latch circuit 5, and are decoded by a CPU 2. Thus, the generation time of the operation command signal *CE' is suppressed to the necessary and sufficient time, and the power consumption of the EPROM is reduced.
Inventors:
Susumu Kubota
Susumu Yamada
Susumu Yamada
Application Number:
JP26623593A
Publication Date:
April 03, 2001
Filing Date:
October 25, 1993
Export Citation:
Assignee:
Sanyo Electric Co., Ltd.
International Classes:
G11C17/00; G06F12/00; G11C16/02; G11C16/06; (IPC1-7): G11C16/02; G06F12/00
Attorney, Agent or Firm:
Masamasa Shibano
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