Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
STATE HISTORY MEMORY CIRCUIT
Document Type and Number:
Japanese Patent JPS62172445
Kind Code:
A
Abstract:

PURPOSE: To grasp the flow of information that comes to cease by providing a control circuit to control a memory, an address counter, a memory selection control circuit, and a readout selection circuit.

CONSTITUTION: State information stored at memories 5W9 are classified to a case where all of the memory blocks are used, and effective state information are stored at all areas, and the case where the use of the memory is ceased before all of the areas are used. A judgment for the above is performed with an address overflow signal sent onto a signal line 120 from an address counter 10, an address signal sent onto a signal line 110 from the address counter 10, and a memory selection signal sent onto a signal line 111 from a memory selection control circuit 11, at a control circuit 13. When a readout command is supplied from a bit of control information on a signal line 130, the control circuit 13 judges the usage status of a memory, and controls a readout operation. In this way, the flow that comes to cease can be grasped.


Inventors:
YAMAMOTO KENTARO
Application Number:
JP1332486A
Publication Date:
July 29, 1987
Filing Date:
January 24, 1986
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NEC CORP
International Classes:
G06F11/34; G06F12/00; G06F12/06; G06F12/16; (IPC1-7): G06F11/34; G06F12/00
Attorney, Agent or Firm:
Toshi Inoguchi



 
Previous Patent: JPS62172444

Next Patent: USER CONTROL SYSTEM