PURPOSE: To increase the degree of freedom of reading and writing characteristics and to stably operate even if low voltage power supply is used by providing further a transfer gate arranged between a pair of bit lines and a node in a conventional SRAM constitution.

CONSTITUTION: Pre-charge is performed so that bit lines NT105, NF106 are both made H state. Successively, a word line N115 is made H state, N type transfer gates 103, 104 are made a selecting state. A word line P116 is also made H state, P type transfer gates 117, 118 are made non-selecting state. L is stored in a node 109 and H is stored in a node 110. Electric charges previously charged in the line NT105 are discharged through the gate 103 and a transistor 111. Next, the node 109 is assumed H state and the node 110 is assumed L state, when these states are written in inverse logic, the line NT105 and a bit line 119 are previously charged to an L state, the line NT106 and a bit line PF120 are previously charged to H state. The line 115 is made H state and the gates 103, 104 are made a selecting state, successively the line P116 is made L state and the P type transfer gates 117, 118 are made a selecting state.