Title:
半導体部品のための応力緩衝パッケージ
Document Type and Number:
Japanese Patent JP2009524922
Kind Code:
A
Abstract:
The present invention relates to a stress buffering package for a semiconductor component, wherein a stress buffering means comprises individual stress buffering elements that do not influence the stress buffering effect from each other. Furthermore the invention relates a method for manufacturing a stress buffering package for a semiconductor component.
Inventors:
Hendrick Pee Hostenbach
Application Number:
JP2008551920A
Publication Date:
July 02, 2009
Filing Date:
January 18, 2007
Export Citation:
Assignee:
NXP B.V.
International Classes:
H01L21/60
Domestic Patent References:
| JPH0513418A | 1993-01-22 | |||
| JP2005191604A | 2005-07-14 | |||
| JPS49112570A | 1974-10-26 | |||
| JPH0936120A | 1997-02-07 | |||
| JPS52150966A | 1977-12-15 | |||
| JPH11266499A | 1999-09-28 |
Foreign References:
| US6396156B1 | 2002-05-28 |
Attorney, Agent or Firm:
Kenji Sugimura
Tatsuya Sawada
Harima Satoko
Tatsuya Sawada
Harima Satoko