STRUCTURE OF CAPACITOR ON TOP OF WAVEFORM APPLICABLE TO HIGH-DENSITY MEMORY

Title:

STRUCTURE OF CAPACITOR ON TOP OF WAVEFORM APPLICABLE TO HIGH-DENSITY MEMORY

Document Type and Number:

Japanese Patent JPH1084095

Kind Code:

A

Abstract:

To manufacture a capacitor for a high-density memory with a larger margin and process amount than in a conventional way and in a simple process.

A polysilicon base layer 116 is deposited. A first material layer 130 and a second material layer 132 which have different etching selectivity are alternately deposited. The alternate layers 130 and 132 are patterned and subjected to an anisotropic etching. The first material layers 130 are etched in a radial direction by a selective etching so that the first material layers 130 may be notched with respect to the second material layers 132. A polysilicon isometric layer 136 is deposited on the structure including notches 138. The alternate layers are removed and the polysilicon isometric layer 136 is left with an increased surface area and used as a memory node of a capacitor.

Inventors:

MCKEE JEFF
MCANALLY PETER S
CRENSHAW DARIUS L
TAYLOR KELLY J
ANDERSON DIRK N

Application Number:

JP14211997A

Publication Date:

March 31, 1998

Filing Date:

May 30, 1997

Export Citation:

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Assignee:

TEXAS INSTRUMENTS INC

International Classes:

H01L27/04; H01L21/02; H01L21/822; H01L21/8242; H01L27/108; (IPC1-7): H01L27/108; H01L21/8242; H01L27/04; H01L21/822

Attorney, Agent or Firm:

Akira Asamura (3 outside)

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