Title:
METHOD OF REDUCING TRANSIENT IMPEDANCE OF CURRENT PATH, AND TRANSIENT IMPEDANCE REDUCING WIRING STRUCTURE
Document Type and Number:
Japanese Patent JP3181160
Kind Code:
B2
Abstract:
PURPOSE: To provide wiring structure which reduces the transient impedance of a current path by simple work execution method.
CONSTITUTION: This structure is equipped with a first current path 1, which has a inflow point 0 of surge and, on the opposite side from the inflow point of surge, an diverging point a, a second current path 3, which has both terminals d and e at the points where the reflected waves by surge are produced and has junctions b and c at the positions a distance d2 each apart from both terminals d and e, and forked current paths 2 nearly the same in length which connect the diverging point 1 with both junctions b and c, respectively.
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Inventors:
Shohei Kato
Miyako Mizobe
Miyako Mizobe
Application Number:
JP29752093A
Publication Date:
July 03, 2001
Filing Date:
November 02, 1993
Export Citation:
Assignee:
Miyako Mizobe
International Classes:
H02H9/04; H02G13/00; (IPC1-7): H02H9/04; H02G13/00
Domestic Patent References:
JP1130482A | ||||
JP6438770U | ||||
JP595410U | ||||
JP588144U |
Attorney, Agent or Firm:
Yoshinori Hirata
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