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Title:
STRUCTURE OF MEMBRANE TRANSISTOR
Document Type and Number:
Japanese Patent JPS5626468
Kind Code:
A
Abstract:

PURPOSE: To reduce a drain current and make it suitable for such an application as a liquid crystal indication device, by detouring a channel region located between a soruce electrode and a drain electrode so that its total passage becomes longer a distance between the electrodes.

CONSTITUTION: A gate electrode 26 is formed on an insulating substrate 25 such as a glass, the gate insulating electrode is surrounded by a gate insulation membrane 27, and a source electrode 29 and a drain electrode 30 are attached onto the end section of the membrane 27 and the substrate 25, respectively. And then, by forming a semiconductor membrane 28 of CdSe and CdSTe, etc. on the surface of the mem- brane 27 which is exposed by being surrounded by these electrodes, a membrane transistor is prepared. In this constitution, a channel region located between the electrodes 29 and 30 is provided with notches which cross these electrodes perpendicularly and are in mutually opposite direction, so that the channel length becomes substantially long. Or, it may be possible to form between these two electrodes a channel consisting of a spiral circuit. It is possible, by doing so, to reduce drain current and also to obtain a satisfactory characteristic.


Inventors:
NONOMURA HIROSAKU
TAKATOU YUTAKA
TAKECHI SADATOSHI
KAMIIDE HISASHI
WADA TOMIO
Application Number:
JP10191279A
Publication Date:
March 14, 1981
Filing Date:
August 09, 1979
Export Citation:
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Assignee:
SHARP KK
International Classes:
G02F1/136; G02F1/1368; G09F9/30; H01L27/12; H01L29/10; H01L29/78; H01L29/786; (IPC1-7): G09F9/35; H01L29/06
Domestic Patent References:
JPS5032186A1975-03-28
JP42000979A