PURPOSE: To simplify a synchronizing circuit by making correspondence only by changing the preset value of a counter even in the case of any nBIC code as a receiving object.

CONSTITUTION: A D flip-flop 1, exclusive OR circuit 2, synchronizing circuit 4, counter 10 with parallel load and AND gate 11 are provided. By setting the preset value of the counter 10 at a prescribed value matched with a monitoring condition corresponding to an (n) [(n) = positive integer number] of the nBIC code, the preset value is synchronized to a supplementary code position. Therefore, in the case of any nBIC code as the receiving object, the correspondence can be made only by changing the preset value of the counter 10. Thus, the synchronizing circuit can be simplified.