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Title:
SYNCHRONIZING LATCH CIRCUIT
Document Type and Number:
Japanese Patent JPH0832413
Kind Code:
A
Abstract:

PURPOSE: To provide a synchronizing latch circuit with small component number and less power consumption.

CONSTITUTION: The synchronizing latch circuit consists of a latch section 11 and a clock generating section 19, the latch section 11 is made up of an output terminal 210, a transfer gate 180 whose input connects to the input terminal 210 and whose conduction/non-conduction is controlled by. an internal clock signal, a latch circuit 190 whose input receives an output of the transfer gate 180, and an output terminal 220 receiving an output of the latch circuit 190. The clock generating section 19 provides an output of an internal clock whose frequency is the same as that of an external clock and having a smaller high level than the high level of the external clock in response to one edge of the received external clock signal.


Inventors:
GOTO HIROYUKI
Application Number:
JP16345594A
Publication Date:
February 02, 1996
Filing Date:
July 15, 1994
Export Citation:
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Assignee:
NEC CORP
International Classes:
G11C11/413; G11C11/407; H03K3/037; (IPC1-7): H03K3/037; G11C11/413
Domestic Patent References:
JPH0193916A1989-04-12
JPS5917719A1984-01-30
JPS59104820A1984-06-16
JPS61294687A1986-12-25
JPH0325793A1991-02-04
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)