PURPOSE: To enable fast and secure control by providing the shared memory of one CPU with semaphore bytes for synchronous control and accessing them from the CPU through connection adapters.
CONSTITUTION: Either of shared memories 24 and 34 provided to a couple of CPUs 20 and 30 is updated. At this time, the other shared memory is updated through connection adapters 25 and 35, so the shared memories 24 and 34 can be read and written fast. Further, the semaphore bytes 40 are provided to the shared memory of the CPU 20 and the other CPU 30 access the semaphore bytes 40 through the connection adapters 25 and 35 as well as the data update. Therefore, the order of the data update and synchronous control need not be confirmed through software, etc., unlike before.
SUDO KIYOSHI
SAKURAI YASUTOMO
ODAWARA KOICHI
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