Title:
SYSTEM FOR AUTOMATICALLY GENERATING INSTRUCTION SEQUENCE FOR VERIFYING PIPELINE OPERATION
Document Type and Number:
Japanese Patent JP3040599
Kind Code:
B2
Abstract:
PURPOSE: To automatically and comprehensively generate an instruction sequence for verifying pipeline operation, with high quality.
CONSTITUTION: The instruction sequence causing pipeline hazard is generated by applying a pipeline specification L1 describing shared hardware resources, the state of using the shared resources on respective pipeline stages and instructions to use those shared resources (S1). The generated instruction sequence is outputted as the instruction sequence for verifying the structure hazard, data hazard and control hazard of a pipe line (S2). On the other hand, the first instruction sequence is generated based on a specification L10 before a hazard avoiding mechanism is introduced (S11), the second instruction sequence is generated based on a specification L11 after the hazard avoiding mechanism is introduced (S12) and the first and second instruction sequences are compared (S12). Thus, the instruction sequence for verifying the operation of the hazard avoiding mechanism can be automatically generated (S13).
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Inventors:
Yotetsu Iwashita
Application Number:
JP14581292A
Publication Date:
May 15, 2000
Filing Date:
June 05, 1992
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F9/38; G06F9/455; G06F11/22; G06F11/28; (IPC1-7): G06F11/28; G06F9/38; G06F9/455
Domestic Patent References:
| JP2244337A | ||||
| JP3127133A | ||||
| JP3290740A | ||||
| JP4256180A | ||||
| JP5265802A |
Attorney, Agent or Firm:
Shunichiro Nagasawa (1 person outside)