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Patent Searching and Data


Title:
SYSTEM FOR DETECTING ERRONEOUS INSERTION OF CONNECTOR
Document Type and Number:
Japanese Patent JPH04106648
Kind Code:
A
Abstract:

PURPOSE: To easily detect erroneous connection due to erroneous insertion of a connector in a short time by respectively adding different codes to the diagnostic pin group of each connector and comparing the reception information of the diagnostic pins of each connector with the reception information obtained at the time of normal connection and stored in a local memory.

CONSTITUTION: The CPU 12 of a card 1 sends a switching signal to a selector 9 and, at the same time, successively adds '1' to the address of a local memory 11 as the initial diagnosis at the system start time. When each connection cord with a connector is normally connected to each connector 6-8, the output of a comparator 10 is always '1', but, when one of the connectors 6-8 is erroneously connected, abnormal value '0' appears in the output of the comparator 10 and the erroneous insertion of the connector is detected, since the information of the sector 9 is different from that of the local memory 11. A diagnostic processor 14 discriminates the erroneously inserted connector of the card 2 from the generated state of the abnormal value '0' and displays the discriminated result on a control panel, etc. Therefore, erroneous connection can be easily detected in a short time.


Inventors:
IIJIMA MASANORI
Application Number:
JP22488390A
Publication Date:
April 08, 1992
Filing Date:
August 27, 1990
Export Citation:
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Assignee:
NEC IBARAKI LTD
International Classes:
G06F13/00; G06F1/18; (IPC1-7): G06F13/00
Attorney, Agent or Firm:
Uchihara Shin