Title:
SYSTEM FOR DETECTING ERROR FOR MIRROR IMAGING MEMORY
Document Type and Number:
Japanese Patent JP3748117
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide an effective and reliable mirror imaging memory data error detection system for a real time synchronizing mirror imaging memory controller in a double controller disk storage system.
SOLUTION: In this system, first data are extracted from the memory of one controller, and almost simultaneously second data are extracted from the mirror imaging memory address position of the other controller. This system separately detects the error of the first data and the error of the second data (100, 105), and almost simultaneously detects the errors of the first data and the second data against the other data (90, 95). An arbitration logical mechanisms (40, 45) manage access to the memories of both the controllers so as to be applied to one controller for simultaneously operating reading from the both surfaces of a mirror, and simultaneously operating data error inspection.
Inventors:
Barry Jay Oldfield
Mark Dee Peterson
Mark Dee Peterson
Application Number:
JP30064095A
Publication Date:
February 22, 2006
Filing Date:
October 25, 1995
Export Citation:
Assignee:
HEWLETT-PACKARD COMPANY
International Classes:
G06F3/06; G06F12/16; G06F11/10; G06F11/16; G06F11/18; G06F11/20; G11B20/18; G11C29/00; (IPC1-7): G06F3/06; G06F3/06; G06F11/18; G06F12/16
Domestic Patent References:
| JP4209022A | ||||
| JP4168670A |
Attorney, Agent or Firm:
Kaoru Furuya
Takahiko Mizobe
Satoshi Furuya
Takahiko Mizobe
Satoshi Furuya