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Title:
TAPE FOR WAFER PROCESSING
Document Type and Number:
Japanese Patent JP2007073930
Kind Code:
A
Abstract:

To provide a tape for wafer processing excellent in cutting ability suitable as a semiconductor wafer dicing die-bond tape used for an adhesion process for piling it with a lead frame or semiconductor chip after dicing.

In a tape 10 for the wafer processing, adhesives layers 3, 4 are formed through an intermediate resin layer 2 consisting of thermosetting resin composite on a substrate film 1. A storage modulus of the intermediate resin layer 2 at 80°C is greater than that of the adhesives layers 3, 4 at 80°C.


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Inventors:
KITA KENJI
OGAWARA YOSUKE
MORISHIMA YASUMASA
ISHIWATARI SHINICHI
Application Number:
JP2006182373A
Publication Date:
March 22, 2007
Filing Date:
June 30, 2006
Export Citation:
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Assignee:
FURUKAWA ELECTRIC CO LTD
International Classes:
H01L21/301; C09J7/02; C09J161/28; C09J163/00; C09J175/04; C09J201/00; C09J201/02; H01L21/52
Domestic Patent References:
JPH0729861A1995-01-31
JPH0729860A1995-01-31
JP2005159155A2005-06-16
JP2005159069A2005-06-16
JP2006049509A2006-02-16
JP2006128577A2006-05-18
JP2006093368A2006-04-06
JP2006156754A2006-06-15
JP2006156753A2006-06-15
Attorney, Agent or Firm:
Toshizo Iida
Wataru Sasaki
Naosuke Miyamae



 
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